The present invention relates to a differential amplifier and, more particularly, to a differential amplifier having a current mirror circuit as a load for a pair of transistors which constitute a differential amplifying circuit.
FIGS. 1, 2 and 3 show conventional differential amplifiers having current mirror circuits as loads. Referring to FIGS. 1 to 3, reference numerals Q1 and Q2 denote npn transistors; Q3 to Q6, pnp transistors; R1 and R2, resistors; 81, a differential amplifying circuit; 82, a constant current source; 83 to 88, current mirror circuits; Vcc, a high power source potential; GND, a low power source potential (generally a ground potential); 89, a non-inverting input terminal; 90, an inverting input terminal; and 91 and 92, output terminals.
Referring to FIG. 1, assume that an input current (a reference current) flowing through the current mirror circuit 83 and an output current therefrom are equal. In this case, when an input signal voltage Vi2 at the terminal 90 is higher than an input signal voltage Vi1 at the terminal 89, a current flows from the terminal 91 as part of the collector current to the collector of the transistor Q1. Then, the collector current of the transistor Q2 becomes higher than that of the transistor Q1. Conversely, when the voltage Vi1 is higher than the voltage Vi2, a current flows from an output current path of the circuit 83 to the terminal 91, so that the collector current of the transistor Q2 becomes smaller than that of the transistor Q1. This operation also applies to the circuit shown in FIG. 2 if a current mirror circuit 84 replaces the circuit 83.
Referring to FIG. 3, when Vi1&gt;Vi2, a signal current of the collector of the transistor Q1 becomes higher than that of the collector of the transistor Q2. Then, due to the operation of the circuits 86 and 87, a signal current of the collector of the transistor Q6 becomes higher than that of the collector of the transistor Q5. The signal of the collector of the transistor Q5 serves as a reference current of the circuit 88. Therefore, the signal current of the collector of a transistor Q8 becomes equal to that of the collector of the transistor Q5. As a result, a signal current of the collector of the transistor Q6 becomes higher than that of the transistor Q8, so that a current corresponding to a difference therebetween flows through the terminal 91.
When Vi1&lt;Vi2, the signal current of the collector of the transistor Q1 becomes higher than that of the collector of the transistor Q2. Then, due to the operation of the circuits 86 and 87, the signal current of the collector of the transistor Q6 serves as the signal current of the transistor Q5. The signal current of the collector of the transistor Q5 then serves as a reference current of the circuit 88. Therefore, the signal current of the collector of the transistor Q8 becomes equal to that of the collector of the transistor Q5. Then, the signal current of the collector of the transistor Q6 becomes lower than that of the collector of the transistor Q8, and a current corresponding to the difference therebetween flows into the amplifier from the terminal 91.
In the amplifier of FIG. 1, the voltage drop across the current mirror circuit is represented by EQU V.sub.F +R2.times.Io/2
where V.sub.F is the forward voltage drop of the diode-connected transistor Q3, Io is the current of the source 82, and R2 is the resistance of the resistor R2. Note that a resistor and its resistance are denoted by the same reference symbols in the following description for the purpose of easy understanding.
The voltage drop can be reduced to a minimum by properly selecting the resistance R2 and the current Io. Then, the amplifier can be operated by a low voltage source.
However, when a current amplification factor .beta. of the transistors Q3 and Q4 of the circuit 83 is small, their base currents cannot be neglected. A current conversion efficiency (current mirror characteristic) of the circuit 83 is degraded and the output current offset at the terminal 91 becomes large. In addition, when the collector-emitter voltage of the transistor Q4 is varied due to variation in the voltage Vcc, the collector current of the transistor Q4 is varied due to its Early effect. In order to prevent this, if the voltage of the power source to be used varies widely, the Early effect must be considered in designing an amplifier. In the amplifier shown in FIG. 1, the resistors R1 and R2 are inserted in order to reduce the Early effect. However, the output current offset is not lowered by the resistors R1 and R2 to an extent that it is negligible.
In the amplifier of FIG. 2, the base current of the transistors Q5 and Q6 of the current mirror circuit 85 flows into the collector of the transistor Q2, while the base current of the transistors Q3 and Q4 of the circuit 84 flows into the collector of the transistor Q1. Thus, the base current corresponding to the circuit 84 is corrected. Therefore, the current-mirror characteristic of the circuit 84 is considerably improved, and the output current offset is decreased. However, offsetting of a certain degree still occurs. Furthermore, since the circuits 84 and 85 are connected in series to each other, the total voltage drop thereacross becomes 2V.sub.F. V.sub.F is the forward bias voltage of a diode-connected transistor. Therefore, the amplifier shown in FIG. 2 cannot be applied to a circuit requiring a minimum operating power source voltage Vccmin of about 0.9 V.
In the circuit shown in FIG. 3, when the current amplification factor .beta. of the pnp transistors Q3 to Q6 constituting the circuits 86 and 87 is small, the base currents of the transistors Q3 to Q6 cannot be neglected. In this case, current mirror characteristics of the circuits 86 and 87 are unsatisfactory and the transistors Q5 and Q6 have different collector-base voltages V.sub.CE. In designing the amplifier, the difference in voltage V.sub.CE must be considered. Furthermore, the collector potential of the transistors Q1 and Q2, is suppressed to Vcc-V.sub.F (where V.sub.F is the forward bias voltage of the diode-connected transistors Q4 and Q3). As a result, in order to apply the amplifier of FIG. 3 to a circuit requiring a minimum operation power source voltage Vccmin of about 0.9 V, collector-emitter saturated voltages V.sub.CESAT of the transistors Q1 and Q2 must be small. Since the collector potentials of the transistors Q1 and Q2 are both Vcc-V.sub.F, the collector and collector-emitter potentials of the transistors Q1 and Q2 vary when Vcc varies. In this case, the collector currents of the respective transistors Q1 and Q2 vary due to the Early effect, resulting in variation in the output offset. As a result, the amplifier of FIG. 3 is not suitable for a circuit requiring a low voltage operation and a power source of a wide voltage range.
The features of the circuits shown in FIGS. 1, 2 and 3 are summarized with respect to items as follows:
______________________________________ Item FIG. 1 FIG. 2 FIG. 3 ______________________________________ Output Offset Large Small Large Operation Possible Impossible Impossible; or at Power required to use Source a transistor Voltage having small Vccmin = 0.9 V V.sub.CESAT Operation within Impossible Impossible Impossible Wide Range of Power Source Voltage (Vcc) ______________________________________